Field of the Invention
The present invention relates to a D/A converter of a delta sigma (modulation) type for audio use having high S/N (signal to noise ratio), particularly to a delta sigma D/A converter having an order equal to or higher than a third order and reducing click sound in mute operation and releasing thereof.
With regard to performance of a D/A converter for audio use, there is frequently used a delta sigma (modulation) type capable of realizing comparatively easily desired total harmonic distortion (ratio of harmonic component to signal), S/N (signal to noise ratio) or the like. According to the delta sigma type, by noise shaping technology, there is achieved an advantage capable of converting, for example, a PCM digital signal of 16 bits or more into a low quantized signal of 2 levels (1 bit) through several levels (several bits) and reproducing an analog signal by a local D/A converter (hereinafter, referred to as local DAC) of several levels.
In muting such a delta sigma output, signal processing can not be carried out so simply as in the case of a PCM (Pulse Code Modulation) audio signal. Conventionally, as a muting method of a D/A converter of a delta sigma type, there is provided a system described in Japanese Patent Publication No. 118647/1995 shown by FIG. 11. According to the system, there is provided a mute circuit 11C between a noise shaper (delta sigma converter) 11A comprising a quantizer 11a, adders 11b, 11c, delay circuits 11d, 11e, 11f, and multipliers 11g, 11h, 11i and a local DAC 11B, a state in the noise shaper 11A is determined by an outside circuit, not illustrated, and a quantizer output X is muted by the mute circuit 11C operated by a clock the same as that of the noise shaper 11A. The object of muting operation in the patent is for preventing idling noise outputted from the quantizer from being outputted even in a state in which an audio input signal of the noise shaper is not present. However, even in this system, a step of the quantizer output in the muting operation is 1 quantized step at minimum. When a size of the 1 quantized step is calculated, in the case in which a full swing output of a D/A converter of 2 through 5 bits is set to 5 Vpp (peak-too-prak), there is constituted the quantized step of 5/(22) through 5/(25)=1.25 through 0.1562 Vpp. FIG. 12 illustrates in simulation the case in which muting operation is carried out when there is constituted an idling variation of a minimum quantized step (xc2x11 level) in a third order noise shaper output of 24 levels. In the muting operation, the step is generated at minimum.
Therefore, according to other conventional delta sigma D/A converter, as shown by FIG. 13, analog mute is frequently carried out at a mute circuit 11D of electronic volume, transistor or the like at a poststage of the local DAC.
As described above, according to the conventional delta sigma type D/A converter, the step of the quantized output in muting operation is 1 quantized step at minimum. A size of the 1 quantized step is far larger than that of PCM and in order to reduce noise in the muting operation, it is substantially indispensable to carry out analog mute at the poststage of the D/A converter. Therefore, there is increased a deterioration in D/A conversion characteristic by an increase in signal path by the analog mute circuit and an amount of control circuit thereof.
The present invention dispenses with the analog mute circuit at the poststage by carrying out a processing in digital at a stage of converting 1 quantized step into analog by a local D/A converter and enabling to mute in steps substantially 1 quantized step by a lower step (normally, refereed to as xe2x80x98soft mutexe2x80x99).
According to an aspect of the invention, there is provided a delta sigma D/A converter comprising a noise shaper having a quantizer for generating an output signal having 3 levels or more at a specific sampling period, a thermometer code converter for converting an output signal of the quantizer into a thermometer code of N levels, N pieces of local D/A converters each in correspondence with 1 level of the thermometer code and an analog adder for adding output signals of N pieces of the local D/A converters and generating an analog signal, further comprising a multiplexor for outputting a mute code for making the analog signal null and the thermometer code selectively to the local D/A converters between the thermometer code converter and local D/A converters wherein a time period of 1/M of the sampling period is made to constitute 1 cycle, the thermometer code is made an output of the multiplexor at m1 (0xe2x89xa6m1xe2x89xa6M) cycle and the mute code is made an output of the multiplexor at other m2 (m2=Mxe2x88x92m1) cycle and a muting operation is carried out by reducing the m1 cycle or increasing the ml cycle to thereby relieve the muting operation in steps at respective sampling period.
Further, it is preferable that the detail sigma D/A converter includes a shift register having N pieces of registers respectively receiving output signals in correspondence with the respective local D/A converters of the multiplexor and cyclically shifting values of the registers by the cycle wherein an output signal of the multiplexor is provided to the local D/A converters via the shift registers.